Keyword:RISC-V

Publications
Simulation Based Evaluation of Bit-Interaction Side-Channel Leakage on RISC-V Processor Tamon Asano and Takeshi Sugawara In:Proceedings of 10th International Workshop on Security Proofs for Embedded Systems
CSD-Driven Speedup in RISC-V Processor Farhad Ebrahimiazandaryani and Dietmar Fey EasyChair Preprint 15796
Evaluating Multiplier-Less CNNs in RISC-V Architecture Bruno Henrique Spies, Mathias Cirolini Michelotti, Leonardo Londero de Oliveira and Everton Alceu Carara EasyChair Preprint 15741
SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors Lennart M. Reimann, Jonathan Wiesner, Dominik Sisejkovic, Farhad Merchant and Rainer Leupers EasyChair Preprint 11019
Task Mapping and Scheduling in FPGA-Based Heterogeneous Real-Time Systems: a RISC-V Case-Study Sallar Ahmadi-Pour, Sangeet Saha, Vladimir Herdt, Rolf Drechsler and Klaus McDonald-Maier EasyChair Preprint 8979